This invention relates to a display controller that controls the display of characters or other patterns on a screen of a display device.
A prior art display controller is shown in block diagram form in FIG. 2. As illustrated in FIG. 2, an oscillator circuit 1 provides a clock signal from which a timing generator 2 generates the necessary timing signals, synchronized to the timing of the TV or other display device. In synchronization with these timing signals, a display memory 9 outputs the data of the characters displayed at the corresponding positions on the screen. These data are used as addresses to transfer the desired character patterns from a character ROM 6 to an output circuit 7. In synchronization with the display timing, the output circuit 7 outputs the display patterns, causing characters or patterns to be displayed on the screen. The function of an input control circuit 8 is to write data received from a microcomputer or other external controller into the display memory 9.
When a display controller of the prior art shown in FIG. 2 is used to display, for example, information like the video tape recorder program reservation in FIG. 3 (where the symbol " " represents a blank space, which must be treated as a type of character) on a TV screen, each screen requires the display of 240 characters (10 lines of 24 characters each). If there are 128 (=2.sup.7) characters, and if characters are turned on and off individually, eight bits of data are required. The display memory therefore requires 1920 bits (=240.times.8) of rewritable memory (RAM), necessitating a large chip size and attendant cost penalty if the display controller is implemented on a single chip.
Another problem arises when the microcomputer or other controller attempts to control the contents of the display. The need to write 1920 bits of data per screen into the display memory puts excessive load on the controller.
In addition, transfer of the data requires time, resulting in image quality problems.